Searched refs:CONFIG_SYS_FSL_OCRAM_BASE (Results 1 – 10 of 10) sorted by relevance
| /u-boot/include/configs/ |
| A D | kontron_sl28.h | 33 #define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_FSL_OCRAM_BASE + 0xeff0)
49 #define CONFIG_MALLOC_F_ADDR CONFIG_SYS_FSL_OCRAM_BASE
73 #define CONFIG_SPL_STACK (CONFIG_SYS_FSL_OCRAM_BASE + 0x9ff0)
|
| A D | ls2080a_common.h | 20 #define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_FSL_OCRAM_BASE + 0xfff0)
205 #define CONFIG_SPL_STACK (CONFIG_SYS_FSL_OCRAM_BASE + 0x9ff0)
|
| A D | ls1088a_common.h | 34 #define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_FSL_OCRAM_BASE + 0xfff0)
220 #define CONFIG_SPL_STACK (CONFIG_SYS_FSL_OCRAM_BASE + 0x9ff0)
|
| A D | ls1012a_common.h | 22 #define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_FSL_OCRAM_BASE + 0xfff0)
|
| A D | ls1043a_common.h | 39 #define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_FSL_OCRAM_BASE + 0xfff0)
|
| A D | ls1046a_common.h | 39 #define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_FSL_OCRAM_BASE + 0xfff0)
|
| /u-boot/arch/arm/include/asm/arch-fsl-layerscape/ |
| A D | config.h | 35 #define CONFIG_SYS_FSL_OCRAM_BASE 0x18000000 /* initial RAM */ macro
178 #define CONFIG_SYS_FSL_OCRAM_BASE 0x18000000 /* initial RAM */ macro
201 #define CONFIG_SYS_FSL_OCRAM_BASE 0x18000000 /* initial RAM */ macro
262 #define CONFIG_SYS_FSL_OCRAM_BASE 0x18000000 /* initial RAM */ macro
302 #define CONFIG_SYS_FSL_OCRAM_BASE 0x10000000 /* initial RAM */ macro
|
| /u-boot/arch/arm/cpu/armv8/fsl-layerscape/ |
| A D | cpu.c | 96 { CONFIG_SYS_FSL_OCRAM_BASE, CONFIG_SYS_FSL_OCRAM_BASE,
159 { CONFIG_SYS_FSL_OCRAM_BASE, CONFIG_SYS_FSL_OCRAM_BASE,
204 { CONFIG_SYS_FSL_OCRAM_BASE, CONFIG_SYS_FSL_OCRAM_BASE,
333 { CONFIG_SYS_FSL_OCRAM_BASE, CONFIG_SYS_FSL_OCRAM_BASE,
443 gd->arch.tlb_addr = CONFIG_SYS_FSL_OCRAM_BASE; in early_mmu_setup()
|
| A D | lowlevel.S | 337 ldr x0, =CONFIG_SYS_FSL_OCRAM_BASE
338 ldr x1, =(CONFIG_SYS_FSL_OCRAM_BASE + CONFIG_SYS_FSL_OCRAM_SIZE)
|
| /u-boot/scripts/ |
| A D | config_whitelist.txt | 2395 CONFIG_SYS_FSL_OCRAM_BASE
|
Completed in 14 milliseconds