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Searched refs:CONFIG_SYS_NAND_BASE_PHYS (Results 1 – 25 of 46) sorted by relevance

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/u-boot/board/Arcturus/ucp1020/
A Dlaw.c19 #ifdef CONFIG_SYS_NAND_BASE_PHYS
20 SET_LAW(CONFIG_SYS_NAND_BASE_PHYS, LAW_SIZE_32K, LAW_TRGT_IF_LBC),
A Dtlb.c72 SET_TLB_ENTRY(1, CONFIG_SYS_NAND_BASE, CONFIG_SYS_NAND_BASE_PHYS,
/u-boot/board/freescale/p1_p2_rdb_pc/
A Dlaw.c17 #ifdef CONFIG_SYS_NAND_BASE_PHYS
18 SET_LAW(CONFIG_SYS_NAND_BASE_PHYS, LAW_SIZE_32K, LAW_TRGT_IF_LBC),
/u-boot/board/freescale/t208xrdb/
A Dlaw.c28 #ifdef CONFIG_SYS_NAND_BASE_PHYS
29 SET_LAW(CONFIG_SYS_NAND_BASE_PHYS, LAW_SIZE_1M, LAW_TRGT_IF_IFC),
/u-boot/board/freescale/t208xqds/
A Dlaw.c28 #ifdef CONFIG_SYS_NAND_BASE_PHYS
29 SET_LAW(CONFIG_SYS_NAND_BASE_PHYS, LAW_SIZE_1M, LAW_TRGT_IF_IFC),
/u-boot/board/freescale/t4rdb/
A Dlaw.c25 #ifdef CONFIG_SYS_NAND_BASE_PHYS
26 SET_LAW(CONFIG_SYS_NAND_BASE_PHYS, LAW_SIZE_64K, LAW_TRGT_IF_IFC),
/u-boot/board/freescale/t102xrdb/
A Dlaw.c26 #ifdef CONFIG_SYS_NAND_BASE_PHYS
27 SET_LAW(CONFIG_SYS_NAND_BASE_PHYS, LAW_SIZE_64K, LAW_TRGT_IF_IFC),
/u-boot/board/freescale/t104xrdb/
A Dlaw.c26 #ifdef CONFIG_SYS_NAND_BASE_PHYS
27 SET_LAW(CONFIG_SYS_NAND_BASE_PHYS, LAW_SIZE_64K, LAW_TRGT_IF_IFC),
/u-boot/board/keymile/kmp204x/
A Dlaw.c27 #ifdef CONFIG_SYS_NAND_BASE_PHYS
28 SET_LAW(CONFIG_SYS_NAND_BASE_PHYS, LAW_SIZE_32K, LAW_TRGT_IF_LBC),
A Dtlb.c103 SET_TLB_ENTRY(1, CONFIG_SYS_NAND_BASE, CONFIG_SYS_NAND_BASE_PHYS,
/u-boot/board/freescale/common/p_corenet/
A Dlaw.c31 #ifdef CONFIG_SYS_NAND_BASE_PHYS
32 SET_LAW(CONFIG_SYS_NAND_BASE_PHYS, LAW_SIZE_1M, LAW_TRGT_IF_LBC),
/u-boot/include/configs/
A Dls1046afrwy.h29 #define CONFIG_SYS_NAND_BASE_PHYS CONFIG_SYS_NAND_BASE macro
32 #define CONFIG_SYS_NAND_CSPR (CSPR_PHYS_ADDR(CONFIG_SYS_NAND_BASE_PHYS) \
A Dls1046ardb.h56 #define CONFIG_SYS_NAND_BASE_PHYS CONFIG_SYS_NAND_BASE macro
59 #define CONFIG_SYS_NAND_CSPR (CSPR_PHYS_ADDR(CONFIG_SYS_NAND_BASE_PHYS) \
A DP2041RDB.h174 #define CONFIG_SYS_NAND_BASE_PHYS 0xfffa00000ull macro
176 #define CONFIG_SYS_NAND_BASE_PHYS CONFIG_SYS_NAND_BASE macro
184 #define CONFIG_SYS_NAND_BR_PRELIM (BR_PHYS_ADDR(CONFIG_SYS_NAND_BASE_PHYS) \
A Dcorenet_ds.h185 #define CONFIG_SYS_NAND_BASE_PHYS 0xfffa00000ull macro
187 #define CONFIG_SYS_NAND_BASE_PHYS CONFIG_SYS_NAND_BASE macro
195 #define CONFIG_SYS_NAND_BR_PRELIM (BR_PHYS_ADDR(CONFIG_SYS_NAND_BASE_PHYS) \
A Dls2080a_common.h132 #define CONFIG_SYS_NAND_BASE_PHYS 0x30000000 macro
A Dkmp204x.h138 #define CONFIG_SYS_NAND_BASE_PHYS 0xfffa00000ull macro
145 #define CONFIG_SYS_NAND_BR_PRELIM (BR_PHYS_ADDR(CONFIG_SYS_NAND_BASE_PHYS) \
A Dls1043ardb.h91 #define CONFIG_SYS_NAND_BASE_PHYS CONFIG_SYS_NAND_BASE macro
94 #define CONFIG_SYS_NAND_CSPR (CSPR_PHYS_ADDR(CONFIG_SYS_NAND_BASE_PHYS) \
A DP1010RDB.h321 #define CONFIG_SYS_NAND_BASE_PHYS 0xfff800000ull macro
323 #define CONFIG_SYS_NAND_BASE_PHYS CONFIG_SYS_NAND_BASE macro
328 #define CONFIG_SYS_NAND_CSPR (CSPR_PHYS_ADDR(CONFIG_SYS_NAND_BASE_PHYS) \
A Dls1088a_common.h121 #define CONFIG_SYS_NAND_BASE_PHYS 0x30000000 macro
A DT102xRDB.h274 #define CONFIG_SYS_NAND_BASE_PHYS (0xf00000000ull | CONFIG_SYS_NAND_BASE) macro
276 #define CONFIG_SYS_NAND_BASE_PHYS CONFIG_SYS_NAND_BASE macro
279 #define CONFIG_SYS_NAND_CSPR (CSPR_PHYS_ADDR(CONFIG_SYS_NAND_BASE_PHYS) \
A Dp1_p2_rdb_pc.h288 #define CONFIG_SYS_NAND_BASE_PHYS 0xfff800000ull macro
290 #define CONFIG_SYS_NAND_BASE_PHYS CONFIG_SYS_NAND_BASE macro
301 #define CONFIG_SYS_NAND_BR_PRELIM (BR_PHYS_ADDR(CONFIG_SYS_NAND_BASE_PHYS) \
/u-boot/board/freescale/p1010rdb/
A Dlaw.c13 SET_LAW(CONFIG_SYS_NAND_BASE_PHYS, LAW_SIZE_1M, LAW_TRGT_IF_IFC),
A Dtlb.c71 SET_TLB_ENTRY(1, CONFIG_SYS_NAND_BASE, CONFIG_SYS_NAND_BASE_PHYS,
/u-boot/board/keymile/kmcent2/
A Dlaw.c17 SET_LAW(CONFIG_SYS_NAND_BASE_PHYS, LAW_SIZE_64K, LAW_TRGT_IF_IFC),

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