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Searched refs:CONFIG_SYS_NUM_CPC (Results 1 – 14 of 14) sorted by relevance

/u-boot/include/configs/
A Dt4qds.h20 #define CONFIG_SYS_NUM_CPC CONFIG_SYS_NUM_DDR_CTLRS macro
A Dkmp204x.h41 #define CONFIG_SYS_NUM_CPC CONFIG_SYS_NUM_DDR_CTLRS macro
A Dcyrus.h45 #define CONFIG_SYS_NUM_CPC CONFIG_SYS_NUM_DDR_CTLRS macro
A DP2041RDB.h37 #define CONFIG_SYS_NUM_CPC CONFIG_SYS_NUM_DDR_CTLRS macro
A Dcorenet_ds.h57 #define CONFIG_SYS_NUM_CPC CONFIG_SYS_NUM_DDR_CTLRS macro
A Dkmcent2.h142 #define CONFIG_SYS_NUM_CPC CONFIG_SYS_NUM_DDR_CTLRS macro
A DT4240RDB.h63 #define CONFIG_SYS_NUM_CPC CONFIG_SYS_NUM_DDR_CTLRS macro
A DT208xRDB.h24 #define CONFIG_SYS_NUM_CPC CONFIG_SYS_NUM_DDR_CTLRS macro
A DT208xQDS.h30 #define CONFIG_SYS_NUM_CPC CONFIG_SYS_NUM_DDR_CTLRS macro
A DT102xRDB.h21 #define CONFIG_SYS_NUM_CPC CONFIG_SYS_NUM_DDR_CTLRS macro
A DT104xRDB.h150 #define CONFIG_SYS_NUM_CPC CONFIG_SYS_NUM_DDR_CTLRS macro
/u-boot/arch/powerpc/cpu/mpc85xx/
A Dcpu_init.c227 for (i = 0; i < CONFIG_SYS_NUM_CPC; i++, cpc++) { in disable_cpc_sram()
297 for (i = 0; i < CONFIG_SYS_NUM_CPC; i++, cpc++) { in enable_cpc()
338 for (i = 0; i < CONFIG_SYS_NUM_CPC; i++, cpc++) { in invalidate_cpc()
A Dfdt.c170 size = CPC_CFG0_SZ_K(cfg0) * 1024 * CONFIG_SYS_NUM_CPC; in ft_fixup_l3cache()
/u-boot/scripts/
A Dconfig_whitelist.txt3114 CONFIG_SYS_NUM_CPC

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