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Searched refs:CONFIG_SYS_PCI1_MEM_PHYS (Results 1 – 25 of 41) sorted by relevance

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/u-boot/board/socrates/
A Dtlb.c44 SET_TLB_ENTRY(1, CONFIG_SYS_PCI1_MEM_PHYS, CONFIG_SYS_PCI1_MEM_PHYS,
52 SET_TLB_ENTRY(1, CONFIG_SYS_PCI1_MEM_PHYS + 0x10000000, CONFIG_SYS_PCI1_MEM_PHYS + 0x10000000,
/u-boot/board/sbc8349/
A Dpci.c23 phys_start: CONFIG_SYS_PCI1_MEM_PHYS,
61 pci_law[0].bar = CONFIG_SYS_PCI1_MEM_PHYS & LAWBAR_BAR; in pci_init_board()
/u-boot/board/tqc/tqm834x/
A Dpci.c21 phys_start: CONFIG_SYS_PCI1_MEM_PHYS,
89 pci_law[0].bar = CONFIG_SYS_PCI1_MEM_PHYS & LAWBAR_BAR; in pci_init_board()
/u-boot/board/xes/xpedite520x/
A Dtlb.c48 SET_TLB_ENTRY(1, CONFIG_SYS_PCI1_MEM_PHYS, CONFIG_SYS_PCI1_MEM_PHYS,
/u-boot/board/freescale/mpc832xemds/
A Dpci.c23 phys_start: CONFIG_SYS_PCI1_MEM_PHYS,
73 pci_law[0].bar = CONFIG_SYS_PCI1_MEM_PHYS & LAWBAR_BAR; in pci_init_board()
131 pci_law[0].bar = CONFIG_SYS_PCI1_MEM_PHYS & LAWBAR_BAR;
/u-boot/board/freescale/mpc8555cds/
A Dtlb.c40 SET_TLB_ENTRY(1, CONFIG_SYS_PCI1_MEM_VIRT, CONFIG_SYS_PCI1_MEM_PHYS,
48 SET_TLB_ENTRY(1, CONFIG_SYS_PCI1_MEM_VIRT + 0x10000000, CONFIG_SYS_PCI1_MEM_PHYS + 0x10000000,
A Dlaw.c33 SET_LAW(CONFIG_SYS_PCI1_MEM_PHYS, LAW_SIZE_512M, LAW_TRGT_IF_PCI),
/u-boot/board/freescale/mpc8541cds/
A Dtlb.c40 SET_TLB_ENTRY(1, CONFIG_SYS_PCI1_MEM_VIRT, CONFIG_SYS_PCI1_MEM_PHYS,
48 SET_TLB_ENTRY(1, CONFIG_SYS_PCI1_MEM_VIRT + 0x10000000, CONFIG_SYS_PCI1_MEM_PHYS + 0x10000000,
A Dlaw.c33 SET_LAW(CONFIG_SYS_PCI1_MEM_PHYS, LAW_SIZE_512M, LAW_TRGT_IF_PCI),
/u-boot/board/freescale/mpc8349itx/
A Dpci.c20 phys_start: CONFIG_SYS_PCI1_MEM_PHYS,
91 pci_law[0].bar = CONFIG_SYS_PCI1_MEM_PHYS & LAWBAR_BAR; in pci_init_board()
/u-boot/board/freescale/mpc8349emds/
A Dpci.c19 phys_start: CONFIG_SYS_PCI1_MEM_PHYS,
137 pci_law[0].bar = CONFIG_SYS_PCI1_MEM_PHYS & LAWBAR_BAR; in pci_init_board()
161 pci_law[0].bar = CONFIG_SYS_PCI1_MEM_PHYS & LAWBAR_BAR; in pci_init_board()
/u-boot/board/esd/vme8349/
A Dpci.c27 phys_start: CONFIG_SYS_PCI1_MEM_PHYS,
100 pci_law[0].bar = CONFIG_SYS_PCI1_MEM_PHYS & LAWBAR_BAR; in pci_init_board()
/u-boot/board/freescale/mpc8313erdb/
A Dmpc8313erdb.c61 .phys_start = CONFIG_SYS_PCI1_MEM_PHYS,
92 pci_law[0].bar = CONFIG_SYS_PCI1_MEM_PHYS & LAWBAR_BAR; in pci_init_board()
/u-boot/board/freescale/mpc8323erdb/
A Dmpc8323erdb.c147 phys_start: CONFIG_SYS_PCI1_MEM_PHYS,
176 pci_law[0].bar = CONFIG_SYS_PCI1_MEM_PHYS & LAWBAR_BAR; in pci_init_board()
/u-boot/include/configs/
A DMPC8548CDS.h324 #define CONFIG_SYS_PCI1_MEM_PHYS 0xc00000000ull macro
327 #define CONFIG_SYS_PCI1_MEM_PHYS 0x80000000 macro
A DTQM834x.h160 #define CONFIG_SYS_PCI1_MEM_PHYS CONFIG_SYS_PCI1_MEM_BASE macro
A Dsocrates.h159 #define CONFIG_SYS_PCI1_MEM_PHYS CONFIG_SYS_PCI1_MEM_BASE macro
A DMPC8555CDS.h250 #define CONFIG_SYS_PCI1_MEM_PHYS 0x80000000 macro
A DMPC8541CDS.h252 #define CONFIG_SYS_PCI1_MEM_PHYS 0x80000000 macro
A Dsbc8349.h162 #define CONFIG_SYS_PCI1_MEM_PHYS CONFIG_SYS_PCI1_MEM_BASE macro
/u-boot/board/freescale/mpc8568mds/
A Dtlb.c50 SET_TLB_ENTRY(1, CONFIG_SYS_PCI1_MEM_VIRT, CONFIG_SYS_PCI1_MEM_PHYS,
/u-boot/board/freescale/mpc8548cds/
A Dtlb.c65 SET_TLB_ENTRY(1, CONFIG_SYS_PCI1_MEM_VIRT, CONFIG_SYS_PCI1_MEM_PHYS,
/u-boot/arch/powerpc/cpu/mpc85xx/
A Dpci.c85 pcix->powbar1 = (CONFIG_SYS_PCI1_MEM_PHYS >> 12) & 0x000fffff; in pci_mpc85xx_init()
109 CONFIG_SYS_PCI1_MEM_PHYS, in pci_mpc85xx_init()
/u-boot/board/ve8313/
A Dve8313.c158 phys_start: CONFIG_SYS_PCI1_MEM_PHYS,
189 out_be32(&pci_law[0].bar, CONFIG_SYS_PCI1_MEM_PHYS & LAWBAR_BAR); in pci_init_board()
/u-boot/board/sbc8548/
A Dtlb.c48 SET_TLB_ENTRY(1, CONFIG_SYS_PCI1_MEM_VIRT, CONFIG_SYS_PCI1_MEM_PHYS,

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