| /u-boot/board/xes/xpedite537x/ |
| A D | tlb.c | 75 SET_TLB_ENTRY(1, CONFIG_SYS_PCIE1_IO_PHYS, CONFIG_SYS_PCIE1_IO_PHYS,
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| /u-boot/board/xes/xpedite550x/ |
| A D | tlb.c | 75 SET_TLB_ENTRY(1, CONFIG_SYS_PCIE1_IO_PHYS, CONFIG_SYS_PCIE1_IO_PHYS,
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| /u-boot/include/configs/ |
| A D | xpedite517x.h | 280 #define CONFIG_SYS_PCIE1_IO_PHYS 0xe8000000 macro
393 #define CONFIG_SYS_DBAT4L (CONFIG_SYS_PCIE1_IO_PHYS |\
397 #define CONFIG_SYS_DBAT4U (CONFIG_SYS_PCIE1_IO_PHYS |\
401 #define CONFIG_SYS_IBAT4L (CONFIG_SYS_PCIE1_IO_PHYS |\
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| A D | controlcenterd.h | 214 #define CONFIG_SYS_PCIE1_IO_PHYS 0xfffc20000ull macro
216 #define CONFIG_SYS_PCIE1_IO_PHYS 0xffc20000 macro
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| A D | sbc8641d.h | 258 #define CONFIG_SYS_PCIE1_IO_PHYS CONFIG_SYS_PCIE1_IO_BUS macro
380 #define CONFIG_SYS_DBAT4L ( CONFIG_SYS_PCIE1_IO_PHYS | BATL_PP_RW \
383 #define CONFIG_SYS_IBAT4L (CONFIG_SYS_PCIE1_IO_PHYS | BATL_PP_RW | BATL_CACHEINHIBIT)
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| A D | MPC8548CDS.h | 348 #define CONFIG_SYS_PCIE1_IO_PHYS 0xfe3000000ull macro
350 #define CONFIG_SYS_PCIE1_IO_PHYS 0xe3000000 macro
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| A D | cyrus.h | 242 #define CONFIG_SYS_PCIE1_IO_PHYS 0xff8000000ull macro
244 #define CONFIG_SYS_PCIE1_IO_PHYS 0xf8000000 macro
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| A D | mpc8308_p1m.h | 192 #define CONFIG_SYS_PCIE1_IO_PHYS 0xB1000000 macro
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| A D | t4qds.h | 149 #define CONFIG_SYS_PCIE1_IO_PHYS 0xff8000000ull macro
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| A D | MPC8308RDB.h | 213 #define CONFIG_SYS_PCIE1_IO_PHYS 0xB1000000 macro
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| /u-boot/board/mpc8308_p1m/ |
| A D | mpc8308_p1m.c | 37 .phys_start = CONFIG_SYS_PCIE1_IO_PHYS,
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| /u-boot/board/freescale/mpc8548cds/ |
| A D | tlb.c | 81 SET_TLB_ENTRY(1, CONFIG_SYS_PCIE1_IO_VIRT, CONFIG_SYS_PCIE1_IO_PHYS,
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| /u-boot/board/gdsys/p1022/ |
| A D | tlb.c | 61 SET_TLB_ENTRY(1, CONFIG_SYS_PCIE1_IO_VIRT, CONFIG_SYS_PCIE1_IO_PHYS,
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| /u-boot/board/freescale/p1010rdb/ |
| A D | tlb.c | 60 SET_TLB_ENTRY(1, CONFIG_SYS_PCIE1_IO_VIRT, CONFIG_SYS_PCIE1_IO_PHYS,
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| /u-boot/board/Arcturus/ucp1020/ |
| A D | tlb.c | 57 SET_TLB_ENTRY(1, CONFIG_SYS_PCIE1_IO_VIRT, CONFIG_SYS_PCIE1_IO_PHYS,
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| /u-boot/board/varisys/cyrus/ |
| A D | tlb.c | 75 SET_TLB_ENTRY(1, CONFIG_SYS_PCIE1_IO_VIRT, CONFIG_SYS_PCIE1_IO_PHYS,
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| /u-boot/board/keymile/kmp204x/ |
| A D | tlb.c | 58 SET_TLB_ENTRY(1, CONFIG_SYS_PCIE1_IO_VIRT, CONFIG_SYS_PCIE1_IO_PHYS,
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| /u-boot/board/keymile/kmcent2/ |
| A D | tlb.c | 54 SET_TLB_ENTRY(1, CONFIG_SYS_PCIE1_IO_VIRT, CONFIG_SYS_PCIE1_IO_PHYS,
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| /u-boot/board/freescale/p1_p2_rdb_pc/ |
| A D | tlb.c | 53 SET_TLB_ENTRY(1, CONFIG_SYS_PCIE1_IO_VIRT, CONFIG_SYS_PCIE1_IO_PHYS,
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| /u-boot/board/freescale/mpc837xerdb/ |
| A D | pci.c | 43 .phys_start = CONFIG_SYS_PCIE1_IO_PHYS,
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| /u-boot/board/freescale/t102xrdb/ |
| A D | tlb.c | 62 SET_TLB_ENTRY(1, CONFIG_SYS_PCIE1_IO_VIRT, CONFIG_SYS_PCIE1_IO_PHYS,
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| /u-boot/board/freescale/t104xrdb/ |
| A D | tlb.c | 75 SET_TLB_ENTRY(1, CONFIG_SYS_PCIE1_IO_VIRT, CONFIG_SYS_PCIE1_IO_PHYS,
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| /u-boot/board/freescale/t4rdb/ |
| A D | tlb.c | 71 SET_TLB_ENTRY(1, CONFIG_SYS_PCIE1_IO_VIRT, CONFIG_SYS_PCIE1_IO_PHYS,
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| /u-boot/board/freescale/mpc8308rdb/ |
| A D | mpc8308rdb.c | 101 .phys_start = CONFIG_SYS_PCIE1_IO_PHYS,
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| /u-boot/board/freescale/common/p_corenet/ |
| A D | tlb.c | 110 SET_TLB_ENTRY(1, CONFIG_SYS_PCIE1_IO_VIRT, CONFIG_SYS_PCIE1_IO_PHYS,
|