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Searched refs:CONFIG_SYS_TIMERBASE (Results 1 – 25 of 29) sorted by relevance

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/u-boot/arch/arm/mach-versatile/
A Dtimer.c39 tmr_ctrl_val = *(volatile ulong *)(CONFIG_SYS_TIMERBASE + 8); in timer_init()
41 *(volatile ulong *)(CONFIG_SYS_TIMERBASE + 8) = tmr_ctrl_val; in timer_init()
55 tmr_ctrl_val = *(volatile ulong *)(CONFIG_SYS_TIMERBASE + 8); in timer_init()
59 *(volatile ulong *)(CONFIG_SYS_TIMERBASE + 8) = tmr_ctrl_val; in timer_init()
/u-boot/board/armltd/integrator/
A Dtimer.c47 #define READ_TIMER (*(volatile ulong *)(CONFIG_SYS_TIMERBASE+4))
58 *(volatile ulong *)(CONFIG_SYS_TIMERBASE + 0) = TIMER_LOAD_VAL; in timer_init()
69 *(volatile ulong *)(CONFIG_SYS_TIMERBASE + 8) = 0x000000C2; in timer_init()
78 *(volatile ulong *)(CONFIG_SYS_TIMERBASE + 8) = 0x00000088; in timer_init()
/u-boot/include/configs/
A Dti_am335x_common.h15 #define CONFIG_SYS_TIMERBASE 0x48040000 /* Use Timer2 */ macro
A Dsocfpga_common.h100 #define CONFIG_SYS_TIMERBASE SOCFPGA_OSC1TIMER0_ADDRESS macro
102 #define CONFIG_SYS_TIMER_COUNTER (CONFIG_SYS_TIMERBASE + 0x4)
A Dintegrator-common.h9 #define CONFIG_SYS_TIMERBASE 0x13000100 /* Timer1 */ macro
A Dti_omap3_common.h53 #define CONFIG_SYS_TIMERBASE (OMAP34XX_GPT2) macro
A Dbur_am335x_common.h31 #define CONFIG_SYS_TIMERBASE 0x48040000 /* Use Timer2 */ macro
A Dti_omap5_common.h20 #define CONFIG_SYS_TIMERBASE GPT2_BASE macro
A Dkc1.h33 #define CONFIG_SYS_TIMERBASE GPT2_BASE macro
A Dti814x_evm.h105 #define CONFIG_SYS_TIMERBASE 0x4802E000 macro
A Dlegoev3.h23 #define CONFIG_SYS_TIMERBASE DAVINCI_TIMER0_BASE macro
A Dsniper.h28 #define CONFIG_SYS_TIMERBASE OMAP34XX_GPT2 macro
A Dzynq-common.h27 #define CONFIG_SYS_TIMERBASE ZYNQ_SCUTIMER_BASEADDR macro
29 #define CONFIG_SYS_TIMER_COUNTER (CONFIG_SYS_TIMERBASE + 0x4)
A Dti816x_evm.h38 #define CONFIG_SYS_TIMERBASE 0x4802E000 macro
A Dcm_t43.h13 #define CONFIG_SYS_TIMERBASE 0x48040000 /* Use Timer2 */ macro
A Dti_omap4_common.h24 #define CONFIG_SYS_TIMERBASE GPT2_BASE macro
A Dtao3530.h141 #define CONFIG_SYS_TIMERBASE (OMAP34XX_GPT2) macro
A Dtricorder.h183 #define CONFIG_SYS_TIMERBASE (OMAP34XX_GPT2) macro
A Dnokia_rx51.h216 #define CONFIG_SYS_TIMERBASE (OMAP34XX_GPT2) macro
A Dam3517_crane.h155 #define CONFIG_SYS_TIMERBASE OMAP34XX_GPT2 macro
A Dam43xx_evm.h12 #define CONFIG_SYS_TIMERBASE 0x48040000 /* Use Timer2 */ macro
A Dsiemens-am33x-common.h65 #define CONFIG_SYS_TIMERBASE 0x48040000 /* Use Timer2 */ macro
/u-boot/arch/arm/mach-socfpga/
A Dtimer.c13 static const struct socfpga_timer *timer_base = (void *)CONFIG_SYS_TIMERBASE;
/u-boot/arch/arm/mach-omap2/
A Dtimer.c29 static struct gptimer *timer_base = (struct gptimer *)CONFIG_SYS_TIMERBASE;
/u-boot/arch/arm/mach-davinci/
A Dtimer.c35 (struct davinci_timer *)CONFIG_SYS_TIMERBASE;

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