CORE_L3_DIV (reference) in projects: u-boot

Searched refs:CORE_L3_DIV (Results 1 – 2 of 2) sorted by relevance

/u-boot/arch/arm/mach-omap2/omap3/
A D	clock.c	`176 0x00000003, CORE_L3_DIV); in dpll3_init_34xx() 222 clrsetbits_le32(&p2, 0x00000003, CORE_L3_DIV); in dpll3_init_34xx() 426 0x00000003, CORE_L3_DIV); in dpll3_init_36xx() 472 clrsetbits_le32(&p2, 0x00000003, CORE_L3_DIV); in dpll3_init_36xx()`
/u-boot/arch/arm/include/asm/arch-omap3/
A D	clocks_omap3.h	`26 #define CORE_L3_DIV 2 /* 166MHz : L3 {DDR} */ macro`

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