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Searched refs:CORE_M3X2 (Results 1 – 2 of 2) sorted by relevance

/u-boot/arch/arm/include/asm/arch-omap3/
A Dclocks_omap3.h22 #define CORE_M3X2 2 /* 332MHz : CM_CLKSEL1_EMU */ macro
37 #define CLSEL1_EMU_VAL ((CORE_M3X2 << 16) | (PER_M6X2 << 24) | (0x0A50))
/u-boot/arch/arm/mach-omap2/omap3/
A Dclock.c146 0x001F0000, (CORE_M3X2 + 1) << 16) ; in dpll3_init_34xx()
148 0x001F0000, CORE_M3X2 << 16); in dpll3_init_34xx()
398 0x001F0000, CORE_M3X2 << 16); in dpll3_init_36xx()

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