Searched refs:CORE_M3X2 (Results 1 – 2 of 2) sorted by relevance
22 #define CORE_M3X2 2 /* 332MHz : CM_CLKSEL1_EMU */ macro37 #define CLSEL1_EMU_VAL ((CORE_M3X2 << 16) | (PER_M6X2 << 24) | (0x0A50))
146 0x001F0000, (CORE_M3X2 + 1) << 16) ; in dpll3_init_34xx()148 0x001F0000, CORE_M3X2 << 16); in dpll3_init_34xx()398 0x001F0000, CORE_M3X2 << 16); in dpll3_init_36xx()
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