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Searched refs:CPLL_MODE_MASK (Results 1 – 9 of 9) sorted by relevance

/u-boot/arch/arm/include/asm/arch-rockchip/
A Dcru_rk3188.h158 CPLL_MODE_MASK = 3, enumerator
A Dcru_rk3128.h100 CPLL_MODE_MASK = 1 << CPLL_MODE_SHIFT, enumerator
A Dcru_rk322x.h94 CPLL_MODE_MASK = 1 << CPLL_MODE_SHIFT, enumerator
A Dcru_rk3288.h192 CPLL_MODE_MASK = CRU_MODE_MASK << CPLL_MODE_SHIFT, enumerator
A Dcru_px30.h156 CPLL_MODE_MASK = 3 << CPLL_MODE_SHIFT, enumerator
/u-boot/drivers/clk/rockchip/
A Dclk_rk3128.c229 GPLL_MODE_MASK | APLL_MODE_MASK | CPLL_MODE_MASK, in rkclk_init()
254 0xff, APLL_MODE_MASK, DPLL_MODE_MASK, CPLL_MODE_MASK, in rkclk_pll_get_rate()
A Dclk_rk3188.c385 CPLL_MODE_MASK << CPLL_MODE_SHIFT, in rkclk_init()
455 CPLL_MODE_MASK << CPLL_MODE_SHIFT, in rkclk_init()
A Dclk_rk3288.c436 GPLL_MODE_MASK | CPLL_MODE_MASK, in rkclk_init()
497 GPLL_MODE_MASK | CPLL_MODE_MASK, in rkclk_init()
A Dclk_px30.c89 APLL_MODE_MASK, DPLL_MODE_MASK, CPLL_MODE_MASK,

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