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Searched refs:CPLL_SW_CFG (Results 1 – 2 of 2) sorted by relevance

/u-boot/arch/mips/mach-mtmips/mt7620/
A Dinit.c41 setbits_32(sysc + SYSCTL_CPLL_CFG0_REG, CPLL_SW_CFG); in cpu_pll_init()
108 if (val & CPLL_SW_CFG) { in mt7620_get_clks()
A Dmt7620.h77 #define CPLL_SW_CFG BIT(31) macro

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