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Searched refs:CPU_CLK_AUX0 (Results 1 – 3 of 3) sorted by relevance

/u-boot/arch/mips/mach-mtmips/mt7620/
A Ddram.c78 (CPU_CLK_AUX1 | CPU_CLK_AUX0); in mt7620_dram_init()
80 if (aux == CPU_CLK_AUX1 || aux == CPU_CLK_AUX0) in mt7620_dram_init()
A Dinit.c38 clrsetbits_32(sysc + SYSCTL_CPLL_CFG1_REG, CPU_CLK_AUX1, CPU_CLK_AUX0); in cpu_pll_init()
59 clrbits_32(sysc + SYSCTL_CPLL_CFG1_REG, CPU_CLK_AUX1 | CPU_CLK_AUX0); in cpu_pll_init()
104 } else if (val & CPU_CLK_AUX0) { in mt7620_get_clks()
A Dmt7620.h91 #define CPU_CLK_AUX0 BIT(24) macro

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