Searched refs:CQSPI_REG_CONFIG_CLK_POL (Results 1 – 1 of 1) sorted by relevance
61 #define CQSPI_REG_CONFIG_CLK_POL BIT(1) macro293 reg &= ~(CQSPI_REG_CONFIG_CLK_POL | CQSPI_REG_CONFIG_CLK_PHA); in cadence_qspi_apb_set_clk_mode()296 reg |= CQSPI_REG_CONFIG_CLK_POL; in cadence_qspi_apb_set_clk_mode()
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