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Searched refs:CR_I (Results 1 – 5 of 5) sorted by relevance

/u-boot/arch/arm/lib/
A Dcache-cp15.c288 cache_enable(CR_I); in icache_enable()
293 cache_disable(CR_I); in icache_disable()
298 return (get_cr() & CR_I) != 0; in icache_status()
/u-boot/arch/arm/mach-uniphier/arm32/
A Dpsci_smp.S15 orr r1, r1, #CR_I @ Enable ICache
/u-boot/arch/arm/include/asm/
A Dsystem.h16 #define CR_I (1 << 12) /* Icache enable */ macro
307 #define CR_I (1 << 12) /* Icache enable */ macro
/u-boot/arch/arm/cpu/armv8/
A Dcache_v8.c709 set_sctlr(get_sctlr() | CR_I); in icache_enable()
714 set_sctlr(get_sctlr() & ~CR_I); in icache_disable()
719 return (get_sctlr() & CR_I) != 0; in icache_status()
A Dcache.S231 movn x1, #(CR_M | CR_C | CR_I)

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