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Searched refs:C_STATE_LATENCY_CONTROL_1_LIMIT (Results 1 – 2 of 2) sorted by relevance

/u-boot/arch/x86/include/asm/arch-broadwell/
A Dcpu.h35 #define C_STATE_LATENCY_CONTROL_1_LIMIT 0x73 macro
/u-boot/arch/x86/cpu/broadwell/
A Dcpu_full.c448 msr.lo = IRTL_VALID | IRTL_1024_NS | C_STATE_LATENCY_CONTROL_1_LIMIT; in configure_c_states()

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