Home
last modified time | relevance | path

Searched refs:DCSR_CGACRE5 (Results 1 – 2 of 2) sorted by relevance

/u-boot/arch/arm/include/asm/arch-fsl-layerscape/
A Dconfig.h111 #define DCSR_CGACRE5 0x700070914ULL macro
/u-boot/arch/arm/cpu/armv8/fsl-layerscape/
A Dsoc.c293 val = in_le32(DCSR_CGACRE5); in erratum_a009635()
294 writel(val | 0x00000200, DCSR_CGACRE5); in erratum_a009635()

Completed in 7 milliseconds