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Searched refs:DDR1 (Results 1 – 6 of 6) sorted by relevance

/u-boot/doc/SPL/
A DREADME.omap333 DDR1: 0x80000000 - 0xBFFFFFFF
49 For the areas that reside within DDR1 they must not be used prior to s_init()
/u-boot/board/freescale/s32v234evb/
A Ds32v234evb.c25 lpddr2_config_iomux(DDR1); in setup_iomux_ddr()
A Dlpddr2.c41 case DDR1: in lpddr2_config_iomux()
/u-boot/arch/arm/include/asm/arch-s32v234/
A Dddr.h10 #define DDR1 1 macro
/u-boot/drivers/ddr/fsl/
A DKconfig144 bool "Freescale DDR1 controller"
/u-boot/
A DREADME437 Freescale DDR1 controller.
452 Board config to use DDR1. It can be enabled for SoCs with
453 Freescale DDR1 or DDR2 controllers, depending on the board

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