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Searched refs:DDR1_MODE_VAL (Results 1 – 2 of 2) sorted by relevance

/u-boot/arch/mips/mach-ath79/ar933x/
A Dddr.c99 #define DDR1_MODE_VAL 0x33 macro
211 writel(DDR1_MODE_VAL, regs + AR71XX_DDR_REG_MODE); in ddr_init()
/u-boot/arch/mips/mach-ath79/qca953x/
A Dddr.c186 #define DDR1_MODE_VAL 0x33 macro
286 writel(DDR1_MODE_VAL, regs + AR71XX_DDR_REG_MODE); in ddr_init()

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