Searched refs:DDR3A_PLL (Results 1 – 4 of 4) sorted by relevance
| /u-boot/board/ti/ks2_evm/ |
| A D | board_k2g.c | 169 [SYSCLK_19MHz] = {DDR3A_PLL, 167, 1, 16},
170 [SYSCLK_24MHz] = {DDR3A_PLL, 133, 1, 16},
171 [SYSCLK_25MHz] = {DDR3A_PLL, 128, 1, 16},
172 [SYSCLK_26MHz] = {DDR3A_PLL, 123, 1, 16},
176 [SYSCLK_19MHz] = {DDR3A_PLL, 194, 1, 14},
177 [SYSCLK_24MHz] = {DDR3A_PLL, 156, 1, 14},
178 [SYSCLK_25MHz] = {DDR3A_PLL, 149, 1, 14},
179 [SYSCLK_26MHz] = {DDR3A_PLL, 144, 1, 14},
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| /u-boot/arch/arm/mach-keystone/include/mach/ |
| A D | clock.h | 31 #define DDR3_PLL DDR3A_PLL
85 DDR3A_PLL, enumerator
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| /u-boot/arch/arm/mach-keystone/ |
| A D | clock.c | 32 [DDR3A_PLL] = {KS2_DDR3APLLCTL0, KS2_DDR3APLLCTL1},
312 case DDR3A_PLL: in pll_freq_get()
360 freq = pll_freq_get(DDR3A_PLL); in ks_clk_get_rate()
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| A D | cmd_clock.c | 35 cmd_pll_data.pll = DDR3A_PLL; in do_pll_cmd()
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