Home
last modified time | relevance | path

Searched refs:DDRC1 (Results 1 – 5 of 5) sorted by relevance

/u-boot/include/dt-bindings/clock/
A Dstm32mp1-clks.h236 #define DDRC1 220 macro
/u-boot/arch/arm/dts/
A Dstm32mp15-u-boot.dtsi53 <&rcc DDRC1>,
/u-boot/doc/board/freescale/
A Db4860qds.rst76 - DDRC1: Ten separate DDR3 parts of 16-bit to support 72-bit (ECC) at 1866MT/s,
228 0x0_8000_0000 0x0_FFFF_FFFF DDRC1 2 GB
261 0x0_0000_0000 0x0_FFFF_FFFF DDRC1 4 GB
/u-boot/doc/device-tree-bindings/memory-controllers/
A Dst,stm32mp1-ddr.txt164 <&rcc_clk DDRC1>,
/u-boot/drivers/clk/
A Dclk_stm32mp1.c515 STM32MP1_CLK(RCC_DDRITFCR, 0, DDRC1, _UNKNOWN_SEL),

Completed in 10 milliseconds