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Searched refs:DDRC2 (Results 1 – 5 of 5) sorted by relevance

/u-boot/include/dt-bindings/clock/
A Dstm32mp1-clks.h238 #define DDRC2 222 macro
/u-boot/arch/arm/dts/
A Dstm32mp15-u-boot.dtsi54 <&rcc DDRC2>,
/u-boot/doc/device-tree-bindings/memory-controllers/
A Dst,stm32mp1-ddr.txt165 <&rcc_clk DDRC2>,
/u-boot/doc/board/freescale/
A Db4860qds.rst78 - DDRC2: Five separate DDR3 parts of 16-bit to support 72-bit (ECC) at 1866MT/s,
229 0x0_0000_0000 0x0_7FFF_FFFF DDRC2 2 GB
/u-boot/drivers/clk/
A Dclk_stm32mp1.c517 STM32MP1_CLK(RCC_DDRITFCR, 2, DDRC2, _UNKNOWN_SEL),

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