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Searched refs:DDRC_ADDRMAP5 (Results 1 – 7 of 7) sorted by relevance

/u-boot/board/beacon/imx8mm/
A Dlpddr4_timing.c60 { DDRC_ADDRMAP5(0), 0x07070707 },
/u-boot/board/freescale/imx8mm_evk/
A Dlpddr4_timing.c60 { DDRC_ADDRMAP5(0), 0x07070707 },
/u-boot/board/freescale/imx8mq_evk/
A Dlpddr4_timing_b0.c74 { DDRC_ADDRMAP5(0), 0x07070707 },
A Dlpddr4_timing.c66 { DDRC_ADDRMAP5(0), 0x07070707 },
/u-boot/board/toradex/colibri_imx7/
A Dimximage.cfg101 /* DDRC_ADDRMAP5 */
/u-boot/board/novtech/meerkat96/
A Dimximage.cfg90 DATA 4 0x307A0214 0x06060606 // DDRC_ADDRMAP5
/u-boot/arch/arm/include/asm/arch-imx8m/
A Dddr.h457 #define DDRC_ADDRMAP5(X) (DDRC_IPS_BASE_ADDR(X) + 0x214) macro

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