Searched refs:DDRC_DRAMTMG2 (Results 1 – 8 of 8) sorted by relevance
/u-boot/drivers/ddr/imx/imx8m/ |
A D | ddrphy_utils.c | 282 rdata = reg32_read(DDRC_DRAMTMG2(0) + addr_slot); in update_umctl2_rank_space_setting() 298 reg32_write((DDRC_DRAMTMG2(0) + addr_slot), tmp_t); in update_umctl2_rank_space_setting() 312 rdata = reg32_read(DDRC_DRAMTMG2(0) + addr_slot); in update_umctl2_rank_space_setting() 321 reg32_write((DDRC_DRAMTMG2(0) + addr_slot), tmp_t); in update_umctl2_rank_space_setting()
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/u-boot/board/beacon/imx8mm/ |
A D | lpddr4_timing.c | 42 { DDRC_DRAMTMG2(0), 0x070E171a },
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/u-boot/board/freescale/imx8mm_evk/ |
A D | lpddr4_timing.c | 42 { DDRC_DRAMTMG2(0), 0x070E171a },
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/u-boot/board/freescale/imx8mq_evk/ |
A D | lpddr4_timing_b0.c | 62 { DDRC_DRAMTMG2(0), 0x070E171a },
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A D | lpddr4_timing.c | 58 { DDRC_DRAMTMG2(0), 0x070E171a },
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/u-boot/board/toradex/colibri_imx7/ |
A D | imximage.cfg | 79 /* DDRC_DRAMTMG2 */
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/u-boot/board/novtech/meerkat96/ |
A D | imximage.cfg | 76 DATA 4 0x307A0108 0x03040407 // DDRC_DRAMTMG2
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/u-boot/arch/arm/include/asm/arch-imx8m/ |
A D | ddr.h | 415 #define DDRC_DRAMTMG2(X) (DDRC_IPS_BASE_ADDR(X) + 0x108) macro
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