Searched refs:DDRC_FREQ2_INIT4 (Results 1 – 4 of 4) sorted by relevance
| /u-boot/board/beacon/imx8mm/ |
| A D | lpddr4_timing.c | 116 { DDRC_FREQ2_INIT4(0), 0x00310008 },
117 { DDRC_FREQ2_INIT4(0), (LPDDR4_MR3 << 16) | 0x0000 },
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| /u-boot/board/freescale/imx8mm_evk/ |
| A D | lpddr4_timing.c | 116 { DDRC_FREQ2_INIT4(0), 0x00310008 },
117 { DDRC_FREQ2_INIT4(0), (LPDDR4_MR3 << 16) | 0x0000 },
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| /u-boot/board/freescale/imx8mq_evk/ |
| A D | lpddr4_timing.c | 132 { DDRC_FREQ2_INIT4(0), 0x00310008 },
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| /u-boot/arch/arm/include/asm/arch-imx8m/ |
| A D | ddr.h | 573 #define DDRC_FREQ2_INIT4(X) (DDRC_IPS_BASE_ADDR(X) + 0x30e0) macro
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