Searched refs:DDRC_INIT4 (Results 1 – 7 of 7) sorted by relevance
| /u-boot/board/freescale/imx8mq_evk/ |
| A D | lpddr4_timing_b0.c | 26 { DDRC_INIT4(0), 0x00330008 },
28 { DDRC_INIT4(0), 0x00310008 },
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| A D | lpddr4_timing.c | 24 { DDRC_INIT4(0), 0x00330008 },
26 { DDRC_INIT4(0), 0x00310008 },
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| /u-boot/board/beacon/imx8mm/ |
| A D | lpddr4_timing.c | 20 { DDRC_INIT4(0), (LPDDR4_MR3 << 16) | 0x0000 },
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| /u-boot/board/freescale/imx8mm_evk/ |
| A D | lpddr4_timing.c | 20 { DDRC_INIT4(0), (LPDDR4_MR3 << 16) | 0x0000 },
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| /u-boot/board/toradex/colibri_imx7/ |
| A D | imximage.cfg | 69 /* DDRC_INIT4 MR2/MR3 */
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| /u-boot/board/novtech/meerkat96/ |
| A D | imximage.cfg | 71 DATA 4 0x307A00E0 0x04080000 // DDRC_INIT4
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| /u-boot/arch/arm/include/asm/arch-imx8m/ |
| A D | ddr.h | 407 #define DDRC_INIT4(X) (DDRC_IPS_BASE_ADDR(X) + 0xe0) macro
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