Home
last modified time | relevance | path

Searched refs:DDRC_INIT7 (Results 1 – 5 of 5) sorted by relevance

/u-boot/board/beacon/imx8mm/
A Dlpddr4_timing.c22 { DDRC_INIT7(0), 0x0006004a },
/u-boot/board/freescale/imx8mm_evk/
A Dlpddr4_timing.c22 { DDRC_INIT7(0), 0x0006004a },
/u-boot/board/freescale/imx8mq_evk/
A Dlpddr4_timing_b0.c31 { DDRC_INIT7(0), 0x0006004a },
A Dlpddr4_timing.c29 { DDRC_INIT7(0), 0x0006004a },
/u-boot/arch/arm/include/asm/arch-imx8m/
A Dddr.h410 #define DDRC_INIT7(X) (DDRC_IPS_BASE_ADDR(X) + 0xec) macro

Completed in 15 milliseconds