DDRC_MSTR (reference) in projects: u-boot

Searched refs:DDRC_MSTR (Results 1 – 9 of 9) sorted by relevance

/u-boot/drivers/ddr/imx/imx8m/
A D	ddrphy_utils.c	`223 ddr_type = reg32_read(DDRC_MSTR(0)) & 0x3f; in get_trained_CDD() 277 ddr_type = reg32_read(DDRC_MSTR(0)) & 0x3f; in update_umctl2_rank_space_setting()`
A D	ddr_init.c	`146 tmp = reg32_read(DDRC_MSTR(0)); in ddr_init()`
/u-boot/board/beacon/imx8mm/
A D	lpddr4_timing.c	`15 { DDRC_MSTR(0), 0xa1080020 },`
/u-boot/board/freescale/imx8mm_evk/
A D	lpddr4_timing.c	`15 { DDRC_MSTR(0), 0xa1080020 },`
/u-boot/board/freescale/imx8mq_evk/
A D	lpddr4_timing_b0.c	`19 { DDRC_MSTR(0), 0xa3080020 },`
A D	lpddr4_timing.c	`17 { DDRC_MSTR(0), 0xa3080020 },`
/u-boot/board/toradex/colibri_imx7/
A D	imximage.cfg	`51 /* DDRC_MSTR */`
/u-boot/board/novtech/meerkat96/
A D	imximage.cfg	`65 DATA 4 0x307A0000 0x01041001 // DDRC_MSTR`
/u-boot/arch/arm/include/asm/arch-imx8m/
A D	ddr.h	`359 #define DDRC_MSTR(X) (DDRC_IPS_BASE_ADDR(X) + 0x00) macro`

Completed in 16 milliseconds