Searched refs:DDRC_PCFGR_0 (Results 1 – 3 of 3) sorted by relevance

/u-boot/board/freescale/imx8mq_evk/
A D	lpddr4_timing_b0.c	120 { DDRC_PCFGR_0(0), 0x000010f3 },
A D	lpddr4_timing.c	85 { DDRC_PCFGR_0(0), 0x000010f3 },
/u-boot/arch/arm/include/asm/arch-imx8m/
A D	ddr.h	506 #define DDRC_PCFGR_0(X) (DDRC_IPS_BASE_ADDR(X) + 0x404) macro

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