Searched refs:DDRP_DXCCR (Results 1 – 2 of 2) sorted by relevance

/u-boot/arch/mips/mach-jz47xx/jz4780/
A D	sdram.c	114 clrsetbits_le32(ddr_phy_regs + DDRP_DXCCR, 0xFF << 4, 0xC4 << 4); in ddr_phy_init()
/u-boot/arch/mips/mach-jz47xx/include/mach/
A D	jz4780_dram.h	50 #define DDRP_DXCCR 0x28 macro

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