Searched refs:DDRP_MR0 (Results 1 – 2 of 2) sorted by relevance

/u-boot/arch/mips/mach-jz47xx/jz4780/
A D	sdram.c	78 writel(ddr_config->mr0, ddr_phy_regs + DDRP_MR0); in ddr_phy_init()
/u-boot/arch/mips/mach-jz47xx/include/mach/
A D	jz4780_dram.h	57 #define DDRP_MR0 0x40 macro

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