Searched refs:DDRP_ZQXCR0 (Results 1 – 2 of 2) sorted by relevance

/u-boot/arch/mips/mach-jz47xx/jz4780/
A D	sdram.c	147 clrsetbits_le32(ddr_phy_regs + DDRP_ZQXCR0(0), 0x3ff, in ddr_phy_init()
/u-boot/arch/mips/mach-jz47xx/include/mach/
A D	jz4780_dram.h	76 #define DDRP_ZQXCR0(n) (0x180 + ((n) * 0x10)) macro

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