DDR_BASE_CS_OFF (reference) in projects: u-boot

Searched refs:DDR_BASE_CS_OFF (Results 1 – 2 of 2) sorted by relevance

/u-boot/arch/arm/mach-mvebu/
A D	cpu.c	`19 #define DDR_BASE_CS_OFF(n) (0x0000 + ((n) << 3)) macro 333 writel(temp, MVEBU_SDRAM_BASE + DDR_BASE_CS_OFF(i)); in update_sdram_window_sizes()`
A D	mbus.c	`80 #define DDR_BASE_CS_OFF(n) (0x0000 + ((n) << 3)) macro 328 u32 base = readl(mbus->sdramwins_base + DDR_BASE_CS_OFF(i)); in mvebu_mbus_default_setup_cpu_target()`

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