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Searched refs:DDR_CLK_DIV (Results 1 – 2 of 2) sorted by relevance

/u-boot/arch/mips/mach-jz47xx/jz4780/
A Dsdram.c223 tmp = tmp / (16 * (1 << DDR_CLK_DIV)) - 1; in sdram_init()
266 writel((DDR_CLK_DIV << 1) | DDRC_REFCNT_REF_EN | in sdram_init()
/u-boot/arch/mips/mach-jz47xx/include/mach/
A Djz4780_dram.h422 #define DDR_CLK_DIV 1 macro

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