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Searched refs:DDR_COMP_ACCURATE (Results 1 – 2 of 2) sorted by relevance

/u-boot/arch/arm/cpu/arm926ejs/spear/
A Dspear600.c44 while (!(readl(&misc_p->ddr_1v8_compensation) & DDR_COMP_ACCURATE)) in sel_1v8()
63 while (!(readl(&misc_p->ddr_2v5_compensation) & DDR_COMP_ACCURATE)) in sel_2v5()
/u-boot/arch/arm/include/asm/arch-spear/
A Dspr_misc.h231 #define DDR_COMP_ACCURATE 0x00000010 macro

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