Searched refs:DDR_PCTL2_PWRCTL (Results 1 – 3 of 3) sorted by relevance
/u-boot/drivers/ram/rockchip/ |
A D | sdram_rk3328.c | 242 pwrctl = readl(pctl_base + DDR_PCTL2_PWRCTL); in data_training() 243 writel(0, pctl_base + DDR_PCTL2_PWRCTL); in data_training() 252 writel(pwrctl, pctl_base + DDR_PCTL2_PWRCTL); in data_training() 332 clrbits_le32(pctl_base + DDR_PCTL2_PWRCTL, (1 << 1)); in enable_low_power() 334 setbits_le32(pctl_base + DDR_PCTL2_PWRCTL, (1 << 1)); in enable_low_power() 336 clrbits_le32(pctl_base + DDR_PCTL2_PWRCTL, 1); in enable_low_power() 338 setbits_le32(pctl_base + DDR_PCTL2_PWRCTL, 1); in enable_low_power() 339 setbits_le32(pctl_base + DDR_PCTL2_PWRCTL, (1 << 3)); in enable_low_power()
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A D | sdram_px30.c | 360 pwrctl = readl(pctl_base + DDR_PCTL2_PWRCTL); in data_training() 361 writel(0, pctl_base + DDR_PCTL2_PWRCTL); in data_training() 370 writel(pwrctl, pctl_base + DDR_PCTL2_PWRCTL); in data_training() 468 clrbits_le32(pctl_base + DDR_PCTL2_PWRCTL, (1 << 1)); in enable_low_power() 470 setbits_le32(pctl_base + DDR_PCTL2_PWRCTL, (1 << 1)); in enable_low_power() 472 clrbits_le32(pctl_base + DDR_PCTL2_PWRCTL, 1); in enable_low_power() 474 setbits_le32(pctl_base + DDR_PCTL2_PWRCTL, 1); in enable_low_power() 475 setbits_le32(pctl_base + DDR_PCTL2_PWRCTL, (1 << 3)); in enable_low_power()
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/u-boot/arch/arm/include/asm/arch-rockchip/ |
A D | sdram_pctl_px30.h | 28 #define DDR_PCTL2_PWRCTL 0x30 macro
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