Searched refs:DDR_PLL_CONFIG1_NINT_VAL (Results 1 – 1 of 1) sorted by relevance

/u-boot/arch/mips/mach-ath79/qca956x/
A D	clk.c	164 #define DDR_PLL_CONFIG1_NINT_VAL DDR_PLL_CONFIG1_NINT_SET(0x1a) macro 269 DDR_PLL_CONFIG1_NINT_VAL); in qca956x_pll_init()

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