Home
last modified time | relevance | path

Searched refs:DDR_PLL_CONFIG_RANGE_SET (Results 1 – 1 of 1) sorted by relevance

/u-boot/arch/mips/mach-ath79/qca956x/
A Dclk.c87 #define DDR_PLL_CONFIG_RANGE_SET(x) \ macro
166 #define DDR_PLL_CONFIG_RANGE_VAL DDR_PLL_CONFIG_RANGE_SET(0)

Completed in 3 milliseconds