DDR_TIMING_CFG_5 (reference) in projects: u-boot

Searched refs:DDR_TIMING_CFG_5 (Results 1 – 6 of 6) sorted by relevance

/u-boot/include/configs/
A D	ls1021atsn.h	`35 #define DDR_TIMING_CFG_5 0x03401400 macro`
A D	ls1021aiot.h	`37 #define DDR_TIMING_CFG_5 0x03401400 macro`
A D	ls1021atwr.h	`36 #define DDR_TIMING_CFG_5 0x03401400 macro`
/u-boot/board/freescale/ls1021aiot/
A D	ls1021aiot.c	`66 out_be32(&ddr->timing_cfg_5, DDR_TIMING_CFG_5); in ddrmc_init()`
/u-boot/board/freescale/ls1021atsn/
A D	ls1021atsn.c	`44 out_be32(&ddr->timing_cfg_5, DDR_TIMING_CFG_5); in ddrmc_init()`
/u-boot/board/freescale/ls1021atwr/
A D	ls1021atwr.c	`160 out_be32(&ddr->timing_cfg_5, DDR_TIMING_CFG_5); in ddrmc_init()`

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