Searched refs:DE (Results 1 – 13 of 13) sorted by relevance
| /u-boot/arch/arm/dts/ |
| A D | socfpga_cyclone5_de0_nano_soc.dts | 9 model = "Terasic DE-0(Atlas)";
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| A D | stm32mp15xx-dhcom-drc02.dts | 35 * during TX anyway and that it only controls drive enable DE
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| A D | stm32f746-disco-u-boot.dtsi | 198 <STM32_PINMUX('K', 7, AF14)>; /* DE */
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| A D | imx6-apalis.dts | 488 /* DE */
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| /u-boot/arch/arm/mach-sunxi/ |
| A D | dram_sunxi_dw.c | 135 MBUS_CONF( DE, true, HIGHEST, 3, 8192, 6120, 1024); in mctl_set_master_priority_h3()
183 MBUS_CONF( DE, true, HIGH, 2, 8192, 6144, 2048); in mctl_set_master_priority_a64()
213 MBUS_CONF( DE, true, HIGHEST, 3, 3400, 2400, 1024); in mctl_set_master_priority_h5()
246 MBUS_CONF( DE, true, HIGH, 0, 128, 48, 0); in mctl_set_master_priority_r40()
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| /u-boot/drivers/ddr/marvell/axp/ |
| A D | ddr3_read_leveling.c | 847 dram_info->rl_val[cs][idx][DE] = delay; in ddr3_read_leveling_single_cs_window_mode()
1102 DEBUG_RL_D((u32) dram_info->rl_val[cs][pup][DE], 2); in ddr3_read_leveling_single_cs_window_mode()
1119 MAX_DELAY_INV + dram_info->rl_val[cs][idx][DE]; in ddr3_read_leveling_single_cs_window_mode()
1136 MAX_DELAY + dram_info->rl_val[cs][idx][DE]; in ddr3_read_leveling_single_cs_window_mode()
1158 dram_info->rl_val[cs][idx][DE]; in ddr3_read_leveling_single_cs_window_mode()
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| A D | ddr3_hw_training.h | 119 #define DE 5 macro
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| /u-boot/doc/ |
| A D | README.mpc85xx | 7 - MSR[DE] must be set
11 To maximize the time during which this requirement is met, U-Boot sets MSR[DE]
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| A D | README.odroid | 171 setenv usbethaddr 02:DE:AD:BE:EF:FF
177 Odroid # setenv usbethaddr 02:DE:AD:BE:EF:FF
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| A D | README.socfpga | 137 Here is an example for the DE-0 Nano SoC after the above rebuild process:
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| /u-boot/arch/x86/include/asm/arch-apollolake/acpi/ |
| A D | gpio.asl | 153 /* PERST DE-Assertion */
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| /u-boot/lib/efi_loader/ |
| A D | Kconfig | 272 RFC 4646 format, e.g. "en-US;de-DE". The first language code is used
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| /u-boot/common/ |
| A D | dlmalloc.src | 3230 (wmglo@Dent.MED.Uni-Muenchen.DE).
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