Searched refs:DIV_ROUND_UP_ULL (Results 1 – 7 of 7) sorted by relevance
| /u-boot/drivers/clk/ |
| A D | clk-divider.c | 71 return DIV_ROUND_UP_ULL((u64)parent_rate, div); in divider_recalc_rate()
143 div = DIV_ROUND_UP_ULL((u64)parent_rate, rate); in divider_get_val()
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| /u-boot/include/linux/ |
| A D | kernel.h | 73 #define DIV_ROUND_UP_ULL(ll, d) DIV_ROUND_DOWN_ULL((ll) + (d) - 1, (d)) macro
78 # define DIV_ROUND_UP_SECTOR_T(ll,d) DIV_ROUND_UP_ULL(ll, d)
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| /u-boot/drivers/clk/analogbits/ |
| A D | wrpll-cln28hpc.c | 195 c->init_r = DIV_ROUND_UP_ULL(parent_rate, MAX_POST_DIVR_FREQ); in __wrpll_update_parent_rate()
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| /u-boot/drivers/clk/meson/ |
| A D | g12a.c | 611 return DIV_ROUND_UP_ULL((u64)parent_rate * SDM_DEN, divisor); in mpll_rate_from_params()
733 frac_rate = DIV_ROUND_UP_ULL((u64)parent_rate_mhz * frac, in meson_pll_get_rate()
742 return (DIV_ROUND_UP_ULL(rate, n) >> od) * 1000000; in meson_pll_get_rate()
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| A D | axg.c | 129 return DIV_ROUND_UP_ULL((u64)parent_rate * SDM_DEN, divisor); in mpll_rate_from_params()
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| A D | gxbb.c | 617 return DIV_ROUND_UP_ULL((u64)parent_rate * SDM_DEN, divisor); in mpll_rate_from_params()
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| /u-boot/drivers/clk/ti/ |
| A D | clk-divider.c | 76 int div = DIV_ROUND_UP_ULL((u64)parent_rate, rate); in _div_round_up()
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