Searched refs:DPCD_TRAINING_PATTERN_SET (Results 1 – 4 of 4) sorted by relevance
| /u-boot/drivers/video/exynos/ |
| A D | exynos_dp.c | 314 ret = exynos_dp_write_bytes_to_dpcd(regs, DPCD_TRAINING_PATTERN_SET, in exynos_dp_link_start()
330 ret = exynos_dp_write_byte_to_dpcd(regs, DPCD_TRAINING_PATTERN_SET, in exynos_dp_training_pattern_dis()
538 DPCD_TRAINING_PATTERN_SET, 5, buf); in exynos_dp_process_clock_recovery()
779 DPCD_TRAINING_PATTERN_SET, &data); in exynos_dp_enable_scramble()
780 exynos_dp_write_byte_to_dpcd(regs, DPCD_TRAINING_PATTERN_SET, in exynos_dp_enable_scramble()
785 DPCD_TRAINING_PATTERN_SET, &data); in exynos_dp_enable_scramble()
786 exynos_dp_write_byte_to_dpcd(regs, DPCD_TRAINING_PATTERN_SET, in exynos_dp_enable_scramble()
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| /u-boot/arch/arm/include/asm/arch-rockchip/ |
| A D | edp_rk3288.h | 461 #define DPCD_TRAINING_PATTERN_SET (0x0102) macro
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| /u-boot/arch/arm/mach-exynos/include/mach/ |
| A D | dp.h | 622 #define DPCD_TRAINING_PATTERN_SET (0x0102) macro
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| /u-boot/drivers/video/rockchip/ |
| A D | rk_edp.c | 474 ret = rk_edp_dpcd_write(regs, DPCD_TRAINING_PATTERN_SET, &value, 1); in rk_edp_link_train_cr()
554 ret = rk_edp_dpcd_write(regs, DPCD_TRAINING_PATTERN_SET, &value, 1); in rk_edp_link_train_ce()
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