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Searched refs:DPLL_MODE (Results 1 – 2 of 2) sorted by relevance

/u-boot/arch/arm/include/asm/arch-rockchip/
A Dsdram_px30.h59 #define DPLL_MODE(n) ((0x3 << (4 + 16)) | ((n) << 4)) macro
/u-boot/drivers/ram/rockchip/
A Dsdram_px30.c182 writel(DPLL_MODE(CLOCK_FROM_XIN_OSC), &dram->cru->mode); in rkclk_set_dpll()
195 writel(DPLL_MODE(CLOCK_FROM_PLL), &dram->cru->mode); in rkclk_set_dpll()

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