Searched refs:DPLL_MODE_MASK (Results 1 – 14 of 14) sorted by relevance
| /u-boot/arch/arm/include/asm/arch-rockchip/ |
| A D | cru_rk3188.h | 164 DPLL_MODE_MASK = 3, enumerator
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| A D | cru_rk3036.h | 91 DPLL_MODE_MASK = 1 << DPLL_MODE_SHIFT, enumerator
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| A D | cru_rk3128.h | 104 DPLL_MODE_MASK = 1 << DPLL_MODE_SHIFT, enumerator
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| A D | cru_rk322x.h | 98 DPLL_MODE_MASK = 1 << DPLL_MODE_SHIFT, enumerator
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| A D | cru_rk3288.h | 198 DPLL_MODE_MASK = CRU_MODE_MASK << DPLL_MODE_SHIFT, enumerator
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| A D | cru_px30.h | 154 DPLL_MODE_MASK = 3 << DPLL_MODE_SHIFT, enumerator
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| /u-boot/drivers/clk/rockchip/ |
| A D | clk_rk322x.c | 188 0xff, APLL_MODE_MASK, DPLL_MODE_MASK, 0xff, in rkclk_pll_get_rate()
346 rk_clrsetreg(&cru->cru_mode_con, DPLL_MODE_MASK, in rk322x_ddr_set_clk()
350 rk_clrsetreg(&cru->cru_mode_con, DPLL_MODE_MASK, in rk322x_ddr_set_clk()
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| A D | clk_rk3188.c | 154 rk_clrsetreg(&cru->cru_mode_con, DPLL_MODE_MASK << DPLL_MODE_SHIFT, in rkclk_configure_ddr()
164 rk_clrsetreg(&cru->cru_mode_con, DPLL_MODE_MASK << DPLL_MODE_SHIFT, in rkclk_configure_ddr()
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| A D | clk_rk3036.c | 186 0xffffffff, APLL_MODE_MASK, DPLL_MODE_MASK, 0xffffffff, in rkclk_pll_get_rate()
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| A D | clk_rk3288.c | 212 rk_clrsetreg(&cru->cru_mode_con, DPLL_MODE_MASK, in rkclk_configure_ddr()
222 rk_clrsetreg(&cru->cru_mode_con, DPLL_MODE_MASK, in rkclk_configure_ddr()
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| A D | clk_rk3128.c | 254 0xff, APLL_MODE_MASK, DPLL_MODE_MASK, CPLL_MODE_MASK, in rkclk_pll_get_rate()
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| A D | clk_px30.c | 89 APLL_MODE_MASK, DPLL_MODE_MASK, CPLL_MODE_MASK,
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| /u-boot/arch/arm/include/asm/arch-rk3308/ |
| A D | cru_rk3308.h | 133 DPLL_MODE_MASK = 3 << DPLL_MODE_SHIFT, enumerator
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| /u-boot/arch/arm/mach-rockchip/rk3036/ |
| A D | sdram_rk3036.c | 333 rk_clrsetreg(&priv->cru->cru_mode_con, DPLL_MODE_MASK, in rkdclk_init()
352 rk_clrsetreg(&priv->cru->cru_mode_con, DPLL_MODE_MASK, in rkdclk_init()
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Completed in 24 milliseconds