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Searched refs:DRAMTMG0_TWTP (Results 1 – 4 of 4) sorted by relevance

/u-boot/arch/arm/mach-sunxi/dram_timings/
A Dddr3_1333.c57 writel(DRAMTMG0_TWTP(twtp) | DRAMTMG0_TFAW(tfaw) | in mctl_set_timing_params()
A Dlpddr3_stock.c53 writel(DRAMTMG0_TWTP(twtp) | DRAMTMG0_TFAW(tfaw) | in mctl_set_timing_params()
A Dddr2_v3s.c54 writel(DRAMTMG0_TWTP(twtp) | DRAMTMG0_TFAW(tfaw) | in mctl_set_timing_params()
/u-boot/arch/arm/include/asm/arch-sunxi/
A Ddram_sunxi_dw.h154 #define DRAMTMG0_TWTP(x) ((x) << 24) macro

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