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Searched refs:DRAMTMG1_TRTP (Results 1 – 4 of 4) sorted by relevance

/u-boot/arch/arm/mach-sunxi/dram_timings/
A Dddr3_1333.c60 writel(DRAMTMG1_TXP(txp) | DRAMTMG1_TRTP(trtp) | DRAMTMG1_TRC(trc), in mctl_set_timing_params()
A Dlpddr3_stock.c56 writel(DRAMTMG1_TXP(txp) | DRAMTMG1_TRTP(trtp) | DRAMTMG1_TRC(trc), in mctl_set_timing_params()
A Dddr2_v3s.c57 writel(DRAMTMG1_TXP(txp) | DRAMTMG1_TRTP(trtp) | DRAMTMG1_TRC(trc), in mctl_set_timing_params()
/u-boot/arch/arm/include/asm/arch-sunxi/
A Ddram_sunxi_dw.h160 #define DRAMTMG1_TRTP(x) ((x) << 8) macro

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