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Searched refs:DRAM_CLK_ROOT (Results 1 – 3 of 3) sorted by relevance

/u-boot/arch/arm/mach-imx/mx7/
A Dclock_slice.c64 {DRAM_CLK_ROOT, CCM_DRAM_CHANNEL,
535 if ((clock_id == DRAM_CLK_ROOT) && (div > CLK_ROOT_POST_DIV7)) { in clock_set_postdiv()
561 if (clock_id == DRAM_CLK_ROOT) in clock_get_postdiv()
734 if ((clock_id == DRAM_PHYM_CLK_ROOT) || (clock_id == DRAM_CLK_ROOT)) in clock_root_enabled()
A Dclock.c480 reg = readl(&ccm_reg->root[DRAM_CLK_ROOT].target_root); in get_ddrc_clk()
/u-boot/arch/arm/include/asm/arch-mx7/
A Dclock.h111 DRAM_CLK_ROOT = 49, enumerator

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