Searched refs:DRAM_SEL_CFG (Results 1 – 5 of 5) sorted by relevance
| /u-boot/arch/arm/include/asm/arch-imx8m/ |
| A D | clock_imx8mm.h | 89 DRAM_SEL_CFG = 48, enumerator
179 DRAM_SEL_CFG = 48, enumerator
260 DRAM_SEL_CFG = 48, enumerator
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| A D | clock_imx8mq.h | 50 DRAM_SEL_CFG = 48, enumerator
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| /u-boot/arch/arm/mach-imx/imx8m/ |
| A D | clock_imx8mq.c | 565 clock_set_target_val(DRAM_SEL_CFG, CLK_ROOT_ON | in dram_enable_bypass()
571 clock_set_target_val(DRAM_SEL_CFG, CLK_ROOT_ON | in dram_disable_bypass()
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| A D | clock_imx8mm.c | 155 clock_set_target_val(DRAM_SEL_CFG, CLK_ROOT_ON | in dram_enable_bypass()
161 clock_set_target_val(DRAM_SEL_CFG, CLK_ROOT_ON | in dram_disable_bypass()
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| A D | clock_slice.c | 471 {DRAM_SEL_CFG, DRAM_SEL_CLOCK_SLICE, 0,
930 {DRAM_SEL_CFG, DRAM_SEL_CLOCK_SLICE, 0,
1284 {DRAM_SEL_CFG, DRAM_SEL_CLOCK_SLICE, 0,
1601 {DRAM_SEL_CFG, DRAM_SEL_CLOCK_SLICE, 0,
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