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Searched refs:DRIVE1_08MA (Results 1 – 3 of 3) sorted by relevance

/u-boot/arch/arm/cpu/armv8/hisilicon/
A Dpinmux.c124 writel(DRIVE1_08MA, &pmx1->iocfg[65]); /* EMMC_CLK */ in hi6220_mmc_config()
150 writel(DRIVE1_08MA | BIT(2), &pmx1->iocfg[4]); /*SD_CMD*/ in hi6220_mmc_config()
151 writel(DRIVE1_08MA | BIT(2), &pmx1->iocfg[5]); /*SD_DATA0*/ in hi6220_mmc_config()
152 writel(DRIVE1_08MA | BIT(2), &pmx1->iocfg[6]); /*SD_DATA1*/ in hi6220_mmc_config()
153 writel(DRIVE1_08MA | BIT(2), &pmx1->iocfg[7]); /*SD_DATA2*/ in hi6220_mmc_config()
154 writel(DRIVE1_08MA | BIT(2), &pmx1->iocfg[8]); /*SD_DATA3*/ in hi6220_mmc_config()
/u-boot/arch/arm/include/asm/arch-hi6220/
A Dpinmux.h33 #define DRIVE1_08MA (2 << 4) macro
/u-boot/include/dt-bindings/pinctrl/
A Dhisi.h40 #define DRIVE1_08MA (2 << 4) macro

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