Searched refs:DS (Results 1 – 7 of 7) sorted by relevance
| /u-boot/drivers/bios_emulator/include/x86emu/ |
| A D | regs.h | 114 #undef DS
121 u16 CS, DS, SS, ES, FS, GS; member
172 #define R_DS seg.DS
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| /u-boot/arch/x86/include/asm/ |
| A D | ptrace.h | 13 #define DS 7 macro
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| /u-boot/arch/mips/mach-mtmips/include/mach/ |
| A D | mc.h | 140 #define DS 0x02 macro
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| /u-boot/drivers/ddr/marvell/axp/ |
| A D | ddr3_read_leveling.c | 359 info->rl_val[cs][idx][DS] = delay; in overrun()
876 dram_info->rl_val[cs][idx][DS] = in ddr3_read_leveling_single_cs_window_mode()
1098 DEBUG_RL_D((u32) dram_info->rl_val[cs][pup][DS], 2); in ddr3_read_leveling_single_cs_window_mode()
1117 MAX_DELAY_INV + dram_info->rl_val[cs][idx][DS]; in ddr3_read_leveling_single_cs_window_mode()
1134 MAX_DELAY + dram_info->rl_val[cs][idx][DS]; in ddr3_read_leveling_single_cs_window_mode()
1156 dram_info->rl_val[cs][idx][DS]; in ddr3_read_leveling_single_cs_window_mode()
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| A D | ddr3_hw_training.h | 117 #define DS 3 macro
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| /u-boot/arch/arm/dts/ |
| A D | am5729-beagleboneai.dts | 453 /* DS: Default speed (DS) up to 25 MHz, including 1- and 4-bit modes (3.3 V signaling). */
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| A D | meson-gxbb-nanopi-k2.dts | 220 "", "", "", "", "eMMC DS",
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