Searched refs:DSP (Results 1 – 12 of 12) sorted by relevance
| /u-boot/doc/ |
| A D | README.Heterogeneous-SoCs | 1 DSP side awareness for Freescale heterogeneous multicore chips based on
7 SC3900/DSP cores and such devices like CPRI, MAPLE, MAPLE-ULB etc.
9 Code for DSP side awareness provides such functionality for Freescale
19 Code added in this file to print the DSP cores and other device's(CPRI,
35 in the system and CONFIGS for SC3900/DSP components
50 DSP/SC3900 core clusters
73 DSP cores and other device's components have been added in this structure.
75 freq_processor_dsp[CONFIG_MAX_DSP_CPUS] - Array to contain the DSP core's frequencies
91 DSP CPU0:1200 MHz, DSP CPU1:1200 MHz, DSP CPU2:1200 MHz, DSP CPU3:1200 MHz,
92 DSP CPU4:1200 MHz, DSP CPU5:1200 MHz,
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| A D | README.omap3 | 7 some family members contain a TMS320C64x+ DSP and/or an Imagination SGX 2D/3D
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| /u-boot/doc/device-tree-bindings/remoteproc/ |
| A D | ti,k3-dsp-rproc.txt | 1 TI K3 DSP devices
4 The TI K3 family of SoCs usually have one or more TI DSP Core sub-systems that
10 a dedicated local power/sleep controller etc. The DSP processor cores in the
14 DSP Device Node:
16 Each DSP Core sub-system is represented as a single DT node. Each node has a
43 DSP Core. Please refer to the corresponding System
44 Controller documentation for valid values for the DSP
48 contain the TI-SCI processor id for the DSP core device
77 /* J721E C66_0 DSP node */
90 /* J721E C71_0 DSP node */
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| /u-boot/drivers/firmware/ |
| A D | Kconfig | 23 compute systems such as ARM, DSP etc with the system controller in
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| /u-boot/arch/x86/include/asm/arch-apollolake/acpi/ |
| A D | pch_hda.asl | 60 * devices that are supported by the DSP.
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| /u-boot/doc/arch/ |
| A D | sh.rst | 27 This CPU has the SH4AL-DSP core.
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| /u-boot/doc/device-tree-bindings/fsp/fsp2/apollolake/ |
| A D | fsp-s.txt | 133 - fsps,dsp-enable: HD Audio DSP Support
179 - fsps,dsp-feature-mask: Bitmask of DSP Feature
185 0x80: DSP based speech pre-processing disabled
186 - fsps,dsp-pp-module-mask: Bitmask of supported DSP Post-Processing Modules
192 0x80: DSP based speech pre-processing disabled
454 compliance for DSP enabled system
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| /u-boot/include/ |
| A D | sym53c8xx.h | 129 #define DSP 0x2c /* --> Script Pointer */ macro
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| /u-boot/arch/arm/dts/ |
| A D | dra71-evm.dts | 77 /* FB_B1 -> LP8733-BUCK2 - VPO_S2_AVS - VDD_DSP_AVS (DSP/eve/iva) */
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| /u-boot/board/ti/ks2_evm/ |
| A D | README | 97 to configure SW1 dip switch to use "No Boot/JTAG DSP Little Endian Boot Mode"
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| /u-boot/arch/arm/mach-rockchip/ |
| A D | Kconfig | 266 and a DSP.
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| /u-boot/ |
| A D | README | 392 connected exclusively to the DSP cores.
396 which is directly connected to the DSP core.
400 connected to the DSP core.
403 This value denotes start offset of DSP CCSR space.
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