| /u-boot/scripts/coccinelle/null/ |
| A D | badzero.cocci | 93 !E
109 (E == 0
110 |E != 0
111 |0 == E
112 |0 != E
134 + !E
137 + E
140 + !E
143 + E
199 E ==
[all …]
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| /u-boot/lib/ |
| A D | sha1.c | 105 E = ctx->state[4]; in sha1_process()
110 P (A, B, C, D, E, W[0]); in sha1_process()
111 P (E, A, B, C, D, W[1]); in sha1_process()
112 P (D, E, A, B, C, W[2]); in sha1_process()
113 P (C, D, E, A, B, W[3]); in sha1_process()
114 P (B, C, D, E, A, W[4]); in sha1_process()
115 P (A, B, C, D, E, W[5]); in sha1_process()
116 P (E, A, B, C, D, W[6]); in sha1_process()
117 P (D, E, A, B, C, W[7]); in sha1_process()
118 P (C, D, E, A, B, W[8]); in sha1_process()
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| A D | sha256.c | 62 uint32_t A, B, C, D, E, F, G, H; in sha256_process() local
109 E = ctx->state[4]; in sha256_process()
114 P(A, B, C, D, E, F, G, H, W[0], 0x428A2F98); in sha256_process()
115 P(H, A, B, C, D, E, F, G, W[1], 0x71374491); in sha256_process()
116 P(G, H, A, B, C, D, E, F, W[2], 0xB5C0FBCF); in sha256_process()
117 P(F, G, H, A, B, C, D, E, W[3], 0xE9B5DBA5); in sha256_process()
118 P(E, F, G, H, A, B, C, D, W[4], 0x3956C25B); in sha256_process()
119 P(D, E, F, G, H, A, B, C, W[5], 0x59F111F1); in sha256_process()
120 P(C, D, E, F, G, H, A, B, W[6], 0x923F82A4); in sha256_process()
121 P(B, C, D, E, F, G, H, A, W[7], 0xAB1C5ED5); in sha256_process()
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| /u-boot/scripts/coccinelle/free/ |
| A D | ifnullfree.cocci | 18 expression E;
20 - if (E != NULL)
22 free(E);
24 kfree(E);
26 vfree(E);
28 vfree_recursive(E);
30 kmem_cache_free(E);
32 kmem_cache_destroy(E);
34 gzfree(E);
38 expression E;
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| /u-boot/arch/arm/dts/ |
| A D | stm32mp15-pinctrl.dtsi | 92 <STM32_PINMUX('E', 6, AF13)>,/* DCMI_D7 */
113 <STM32_PINMUX('E', 6, ANALOG)>,/* DCMI_D7 */
318 <STM32_PINMUX('E', 7, AF12)>, /* FMC_D4 */
319 <STM32_PINMUX('E', 8, AF12)>, /* FMC_D5 */
320 <STM32_PINMUX('E', 9, AF12)>, /* FMC_D6 */
321 <STM32_PINMUX('E', 10, AF12)>, /* FMC_D7 */
361 <STM32_PINMUX('E', 7, AF12)>, /* FMC_D4 */
362 <STM32_PINMUX('E', 8, AF12)>, /* FMC_D5 */
363 <STM32_PINMUX('E', 9, AF12)>, /* FMC_D6 */
364 <STM32_PINMUX('E', 10, AF12)>, /* FMC_D7 */
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| A D | stm32f429-disco-u-boot.dtsi | 143 <STM32_PINMUX('E',15, AF12)>, /* D12 */
144 <STM32_PINMUX('E',14, AF12)>, /* D11 */
145 <STM32_PINMUX('E',13, AF12)>, /* D10 */
146 <STM32_PINMUX('E',12, AF12)>, /* D09 */
147 <STM32_PINMUX('E',11, AF12)>, /* D08 */
148 <STM32_PINMUX('E',10, AF12)>, /* D07 */
149 <STM32_PINMUX('E', 9, AF12)>, /* D06 */
150 <STM32_PINMUX('E', 8, AF12)>, /* D05 */
151 <STM32_PINMUX('E', 7, AF12)>, /* D04 */
157 <STM32_PINMUX('E', 0, AF12)>, /* NBL0 */
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| A D | stm32746g-eval-u-boot.dtsi | 111 <STM32_PINMUX('E',15, AF12)>, /* D12 */
112 <STM32_PINMUX('E',14, AF12)>, /* D11 */
113 <STM32_PINMUX('E',13, AF12)>, /* D10 */
114 <STM32_PINMUX('E',12, AF12)>, /* D9 */
115 <STM32_PINMUX('E',11, AF12)>, /* D8 */
116 <STM32_PINMUX('E',10, AF12)>, /* D7 */
117 <STM32_PINMUX('E', 9, AF12)>, /* D6 */
118 <STM32_PINMUX('E', 8, AF12)>, /* D5 */
119 <STM32_PINMUX('E', 7, AF12)>, /* D4 */
127 <STM32_PINMUX('E', 1, AF12)>, /* NBL1 */
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| A D | stm32f746-disco-u-boot.dtsi | 126 <STM32_PINMUX('E',15, AF12)>, /* D12 */
127 <STM32_PINMUX('E',14, AF12)>, /* D11 */
128 <STM32_PINMUX('E',13, AF12)>, /* D10 */
129 <STM32_PINMUX('E',12, AF12)>, /* D9 */
130 <STM32_PINMUX('E',11, AF12)>, /* D8 */
131 <STM32_PINMUX('E',10, AF12)>, /* D7 */
132 <STM32_PINMUX('E', 9, AF12)>, /* D6 */
133 <STM32_PINMUX('E', 8, AF12)>, /* D5 */
134 <STM32_PINMUX('E', 7, AF12)>, /* D4 */
140 <STM32_PINMUX('E', 1, AF12)>, /* NBL1 */
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| A D | stm32h7-u-boot.dtsi | 150 <STM32_PINMUX('E', 0, AF12)>,
151 <STM32_PINMUX('E', 1, AF12)>,
152 <STM32_PINMUX('E', 7, AF12)>,
153 <STM32_PINMUX('E', 8, AF12)>,
154 <STM32_PINMUX('E', 9, AF12)>,
155 <STM32_PINMUX('E',10, AF12)>,
156 <STM32_PINMUX('E',11, AF12)>,
157 <STM32_PINMUX('E',12, AF12)>,
158 <STM32_PINMUX('E',13, AF12)>,
159 <STM32_PINMUX('E',14, AF12)>,
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| A D | stm32f769-disco-u-boot.dtsi | 161 <STM32_PINMUX('E',15, AF12)>, /* D12 */
162 <STM32_PINMUX('E',14, AF12)>, /* D11 */
163 <STM32_PINMUX('E',13, AF12)>, /* D10 */
164 <STM32_PINMUX('E',12, AF12)>, /* D9 */
165 <STM32_PINMUX('E',11, AF12)>, /* D8 */
166 <STM32_PINMUX('E',10, AF12)>, /* D7 */
167 <STM32_PINMUX('E', 9, AF12)>, /* D6 */
168 <STM32_PINMUX('E', 8, AF12)>, /* D5 */
169 <STM32_PINMUX('E', 7, AF12)>, /* D4 */
177 <STM32_PINMUX('E', 1, AF12)>, /* NBL1 */
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| A D | stm32429i-eval-u-boot.dtsi | 173 <STM32_PINMUX('E',15, AF12)>, /* D12 */
174 <STM32_PINMUX('E',14, AF12)>, /* D11 */
175 <STM32_PINMUX('E',13, AF12)>, /* D10 */
176 <STM32_PINMUX('E',12, AF12)>, /* D09 */
177 <STM32_PINMUX('E',11, AF12)>, /* D08 */
178 <STM32_PINMUX('E',10, AF12)>, /* D07 */
179 <STM32_PINMUX('E', 9, AF12)>, /* D06 */
180 <STM32_PINMUX('E', 8, AF12)>, /* D05 */
181 <STM32_PINMUX('E', 7, AF12)>, /* D04 */
187 <STM32_PINMUX('E', 0, AF12)>, /* NBL0 */
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| A D | stm32f469-disco-u-boot.dtsi | 165 <STM32_PINMUX('E',15, AF12)>, /* D12 */
166 <STM32_PINMUX('E',14, AF12)>, /* D11 */
167 <STM32_PINMUX('E',13, AF12)>, /* D10 */
168 <STM32_PINMUX('E',12, AF12)>, /* D09 */
169 <STM32_PINMUX('E',11, AF12)>, /* D08 */
170 <STM32_PINMUX('E',10, AF12)>, /* D07 */
171 <STM32_PINMUX('E', 9, AF12)>, /* D06 */
172 <STM32_PINMUX('E', 8, AF12)>, /* D05 */
173 <STM32_PINMUX('E', 7, AF12)>, /* D04 */
179 <STM32_PINMUX('E', 0, AF12)>, /* NBL0 */
[all …]
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| /u-boot/scripts/coccinelle/iterators/ |
| A D | list_entry_update.cocci | 20 expression x,E;
24 list_for_each_entry@p1(x,...) { <... x =@p2 E ...> }
27 expression x,E;
32 *x =@p2 E
39 expression x,E;
44 x =@p2 E
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| A D | itnull.cocci | 23 expression x,E,E1,E2;
35 E
38 E
66 expression x,E;
71 { ... when != x = E
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| A D | use_after_iter.cocci | 22 expression E,x;
128 c = E
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| /u-boot/arch/x86/include/asm/arch-quark/acpi/ |
| A D | irqroute.h | 9 PCI_DEV_PIRQ_ROUTE(QUARK_DEV_20, E, F, G, H), \
10 PCI_DEV_PIRQ_ROUTE(QUARK_DEV_21, E, F, G, H), \
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| /u-boot/board/nvidia/p2571/ |
| A D | p2571.c | 42 gpio_request(TEGRA_GPIO(E, 4), "FAN_VDD"); in start_cpu_fan()
43 gpio_direction_output(TEGRA_GPIO(E, 4), 1); in start_cpu_fan()
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| /u-boot/include/ |
| A D | signatures.h | 59 #define SIGNATURE_64(A, B, C, D, E, F, G, H) \ argument
60 (SIGNATURE_32(A, B, C, D) | ((u64)(SIGNATURE_32(E, F, G, H)) << 32))
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| /u-boot/scripts/kconfig/tests/rand_nested_choice/ |
| A D | Kconfig | 24 config E config in choice4936e6000104""choice4936e6000204""choice4936e6000304
25 bool "E"
|
| /u-boot/doc/chromium/devkeys/ |
| A D | kernel.keyblock | 3 …E�8Kf�\,����� {#�� 2�#�+rאSR���r�p<�'B�+T��a�Ԩ���=�ކ���(^ڴG���I�c�B � �l���4��D�z�a��d…
4 …F �%)'f�\������^�U™��.f *a��A�T���&[w|��h����بO���塈z�Ř4 �cU����K���Eڤ��zPj��o�� ���HS�� …
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| /u-boot/scripts/coccinelle/net/ |
| A D | mdio_register.cocci | 54 expression E;
72 - return E;
73 + int retval = E;
|
| /u-boot/board/freescale/mpc8349itx/ |
| A D | README | 15 E) No Vitesse 7385 5-port Ethernet switch
29 E BOOT1 ON (0) Flash EEPROM boot device
34 Jumper J22.E is only for the ITX, and it decides the configuration
35 of the flash chips. If J22.E is ON (i.e. jumpered), then flash chip
37 If J22.E is OFF, then U7 is at FE000000 and U4 is at FE800000.
39 For U-Boot development, J22.E can be used to switch back-and-forth
60 On the ITX, jumper J22.E is used to determine which flash chips are
61 at which address. When J22.E is switched, addresses from FE000000
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| /u-boot/scripts/kconfig/tests/new_choice_with_dep/ |
| A D | expected_stdout | 8 > 2. Choice E (CHOICE_E)
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| A D | Kconfig | 29 bool "Choice E"
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| /u-boot/scripts/ |
| A D | Kconfig.include | 23 cc-option = $(success,$(CC) -Werror $(1) -E -x c /dev/null -o /dev/null)
|